1. Technical Field
The present invention relates to a voltage regulator whose output terminal is connected with a backup battery.
2. Background Art
Such a circuit as illustrated in FIG. 11 has been known as a conventional voltage regulator whose output terminal is connected with a backup battery 112 (see, for example, Patent Document 1).
Power supply voltage is applied between terminals, that is, a VDD terminal 121 and a VSS terminal 123. An output terminal 122 is connected with the backup battery 112, and even when the power supply voltage between the VDD terminal 121 and the VSS terminal 123 becomes zero, a load 113 (for example, RAM) may be continued to be supplied with voltage.
When the power supply voltage is being supplied between the VDD terminal 121 and the VSS terminal 123, and when the voltage between the terminals and the voltage of the backup battery are respectively represented by VBAT1 and VBAT2, “VBAT1>VBAT2” is normally established. When the power supply voltage is being supplied between the VDD terminal 121 and the VSS terminal 123, a Vref circuit 101 outputs a given constant voltage (Vref), and an error amplifier 102 amplifies a differential voltage between the voltage Vref and a voltage (R2/(R1+R2)×VOUT) determined by dividing the voltage (VOUT) of the output terminal 122 by means of a resistor 107 (whose resistance is R1) and a resistor 108 (whose resistance is R2). Accordingly, a gate of a Pch transistor 103 serving as an output transistor is controlled so that a constant voltage is output to the output terminal 122.
A comparator 1105 has a positive input terminal connected with a voltage determined by dividing the inter-terminal voltage between the VDD terminal 121 and the VSS terminal 123 by means of a resistor 1101 and a resistor 1102, and has a negative input terminal connected with a voltage determined by dividing an inter-terminal voltage between the output terminal 122 and the VSS terminal 123 by means of a resistor 1103 and a resistor 1104. Then, the comparator 1105 compares the terminal voltage of the VDD terminal 121 with the terminal voltage of the output terminal 122. When the power supply voltage is being supplied between the VDD terminal 121 and the VSS terminal 123, the voltage determined by the voltage division by means of the resistor 1101 and the resistor 1102 is higher than the voltage determined by the voltage division by means of the resistor 1103 and the resistor 1104. Therefore, an output of the comparator 1105 becomes “H”, and then a Pch transistor 105 is turned ON while a Pch transistor 106 is turned OFF. Accordingly, with the Pch transistor 105, a substrate (Nwell) potential of the Pch transistor 103 becomes a potential of the VDD terminal 121.
On the other hand, when the inter-terminal voltage between the VDD terminal 121 and the VSS terminal 123 becomes lower than the inter-terminal voltage between the output terminal 122 and the VSS terminal 123, the output of the comparator 1105 becomes “L”, and then the Pch transistor 106 is turned ON while the Pch transistor 105 is turned OFF. Accordingly, with the Pch transistor 106, the substrate (Nwell) potential of the Pch transistor becomes a potential of the output terminal 122.
In other words, by switching the substrate (Nwell) potential of the Pch transistor 103 to a higher one of the potentials on the VDD terminal 121 side and the output terminal 122 side, even when the voltage of the VDD terminal 121 becomes lower than the voltage of the output terminal 122, a current is prevented from flowing from the output terminal 122 to the VDD terminal 121 via a parasitic diode formed with a substrate of the Pch transistor 103.
Patent Document 1
JP 2001-51735 A